Technical Specifications

* Input Channels
– 2 Channel Time Division Multiplexed Pulse Code Modulation Receiver.
* Mode of Operation
– Fast (240 KHz/Channel approx)
– Slow (1Hz. /channel approx.)
* On-board features
– Pseudo random sync. Code generator for FRAME Synchronization.
– Receiver clock generation using PLL
– Error Detection of None, Even, Odd, Hamming
– Error Correction using Hamming Code technique
– None, Even, Odd, Hamming Parity selections
– Two Nos. of 4th order Butterworth Low pass filter with cut off frequency of 3.4 KHz.
– Four Switched Faults for Fault Selection
– Block Description Screen printed on glassy epoxy PCB
* Interconnections
– All interconnections are made using 2mm banana Patch cords.
* Test points are provided to analyze signals at various points.
* All ICS are mounted on IC Sockets.
* Bare board Tested Glass Epoxy SMOBC PCB is used.
* In-Built Power Supply of +5V/1.5A, ±12V/250mA with Power ON indication
* Attractive Wooden enclosures of Light weight Australian Pine Wood.
* Set of 2mm Patch cords for interconnections
* User’s Manual with sample experimental programs
LIST OF EXPERIMENTS
– Study of Sampling and Multiplexing Techniques and the Reconstruction
– To study the principles of Analog to Digital and Digital to Analog Conversion
– Study of Pseudo Random Sequences
– Study of Error Check Code Logic:
– None Parity Coding.
– Odd Parity Coding
– Even Parity Coding